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The Principal Engineer will lead design verification for mixed-signal power converters, developing testbenches, verification plans, and metrics, while mentoring engineers and ensuring end-to-end verification readiness.

Provides technical leadership for large-scale software initiatives by defining technical strategies, guiding architecture decisions, solving complex cross-domain challenges, establishing engineering standards, and influencing teams across the organization. The role mentors engineers, leads multi-team projects, supports CI/CD and automated testing practices, advises strategic planning, and drives innovation and best-practice adoption.

Provide technical leadership in mixed-signal IC design (ADCs, DACs, SerDes, PLLs) for SoC products using FinFET processes. Drive architecture decisions, transistor-level design, layout guidance, evaluation/test, mentorship, and cross-functional collaboration to deliver high-performance semiconductor solutions.

The Senior Principal Analog/Mixed-Signal Design Engineer will design sophisticated mixed-signal ICs, lead projects, mentor engineers, and innovate design methodologies while ensuring optimal performance through collaboration.

Designs and implements DFT architectures and specifications for ASIC/SoC products. Responsibilities include scan insertion, ATPG pattern development, compression and clock-control insertion, optimizing test coverage and power, and pre- and post-silicon verification and debug. The role also requires gate-level simulation, failure analysis, scripting, and collaboration across product teams.

Support Global Costing by executing quarterly standard costing, maintaining SAP and Impact3C, performing product costing and manufacturing cost analysis, analyzing cost variances, supporting COGS and inventory valuation, partnering with Finance/Operations/Supply Chain/IT, driving process automation, and ensuring SOX and accounting policy compliance.

Support and enhance ADI's global compliance program aligned to enterprise risk and ISO 37301. Monitor regulatory developments, update policies, execute risk‑based monitoring and testing, manage investigations and remediation, support audits, develop training and communications, track metrics, and collaborate with Legal, HR, Finance, IT, and Operations to drive continuous improvement.

Develop RTL for digital blocks, perform lint/CDC analysis and DFT support, assist in writing functional tests and simple UVM components, collaborate on verification and coverage closure, support AMS co-simulation and mixed-signal integration, and work with physical design on synthesis and timing.

Design and simulate transistor-level analog/mixed-signal IC blocks (amplifiers, converters, power circuits), define architectures, integrate blocks into mixed-signal systems, present results to teams/customers, support layout, lab evaluation and test, mentor others, and improve design methodologies to meet power, timing and functional objectives.