Teams at Axelera AI

Lead end-to-end hardware quality across incoming inspection, NPI, production, and field returns. Establish IQC/OQC/RMA processes, supplier qualification/audits, NPI quality gates, certifications, QMS (ISO 9001), and drive RCA/CAPA and quality metrics reporting.

Lead ASIC physical design activities from RTL to GDS including synthesis, floorplanning, place-and-route, CTS, timing optimization, extraction, physical verification, EMIR signoff, and IP integration. Drive automation with Python/Tcl/Bash, debug physical-design challenges, and collaborate closely with architecture, RTL, and verification teams to deliver multi-core in-memory compute SoCs.

Design and implement digital micro-architectures and RTL for AI SoC components, integrate 3rd-party IPs, run static checks and verification, optimize for performance/power/area, automate flows with scripting, and collaborate with verification and physical design teams on DFM/DFT and timing closure.