We are seeking a highly skilled Senior Verification Engineer to join our team. The successful candidate will be responsible for the hands-on verification of ultra-low-power cryo-control systems for our quantum processors. You will take technical ownership of functional verification, ensuring correct operation, expected performance, and robustness of complete sections of the cryo-control system for a multi‑qubit processor.
If you’re curious about quantum computing but haven’t worked in the field before, this is an opportunity to apply your verification expertise to a new domain where the challenges are unique, the learning curve is steep, but the impact is extraordinary.
Main Duties and ResponsibilitiesWork closely with architecture and hardware teams to understand the functional requirements of cryo-control systems and translate them into detailed verification plans and test sequences.
Take responsibility for the verification of specific cryo-control sub-systems, driving the process from initial test planning through to 100% functional and code coverage.
Create, execute, and maintain directed and constrained-random testcases to verify the functionality, performance, and robustness of cryo-control designs against specifications.
Develop and execute low-power verification strategies, including UPF-based power intent modelling, power-state coverage, and verification of power-gating, retention, and isolation behaviour across cryogenic operating modes.
Design, implement, and continuously improve scalable verification infrastructure spanning unit‑level to full use‑case modelling. Build modular, reusable SystemVerilog environments and Python‑based tooling to verify complex control loops and quantum‑classical interfaces.
Drive best‑practice methodology adoption using open‑source frameworks, rigorous version control with git, and automated CI pipelines (e.g., GitHub Actions) for regression execution, results dashboarding, and reporting. Contribute to custom tools and automation to enhance productivity, maintainability, and quality across the wider team.
Act as the primary technical bridge to the lab validation team. When issues are identified during cryo-characterisation in the fridge, you will lead the effort to replicate silicon behaviour in the simulation environment, perform root-cause analysis, and develop regression tests to ensure long-term stability.
Generate clear and concise documentation, reports, and regular presentations to communicate verification plans, status and metrics to stakeholders.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field.
At least 7 years of experience in SoC verification, some of which involve post-silicon validation support.
Proficiency in SystemVerilog and hardware description languages (Verilog). Experience of C/C++ development and debug. Strong scripting skills in Python for test automation and data analysis. Experience with UPF or similar power-intent methodologies is highly desirable.
Advanced problem-solving skills with the ability to debug complex issues across the digital–analog boundary and translate lab observations into simulation-based fixes.
Familiarity with high-speed and real-time control loops, embedded processor architectures, or mixed-signal systems and AMS is beneficial.
Strong communication and collaboration skills, with the ability to work effectively across physics, analog, and digital design teams.
Self-motivated and able to drive technical tasks from start to finish with minimal supervision in a fast-paced R&D environment.
If you are a highly motivated and experienced SoC verification engineer looking for a challenging and rewarding role, we encourage you to apply for this exciting opportunity.
Equal1 Dublin, Dublin, IRL Office
Dublin, Dublin, Ireland, D04 V1W8
