Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors.
Founded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs.
Composed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles:
Do great things: we deliver work we’re proud to sign our name to.
High velocity: speed matters. We move quickly, one step at a time.
One unit: we’re all in this together, with relationships grounded in trust, respect, and camaraderie.
Arago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders.
What you’ll doLead the design and implementation of high-performance analog and mixed-signal IC layouts, from floor-planning to tape-out, ensuring precision, manufacturability, and alignment with foundry specifications.
ResponsibilitiesLead the layout phases for Arago’s tape-outs, including floor-planning, blocks and interfaces, and coordinating with internal and freelance engineers.
Design and implement custom layouts for analog and mixed-signal circuits, including custom analog and RF components, while minimizing parasitic effects to enhance the DC and AC precision of analog signals.
Create floor-plans and block-level layouts for high-performance analog systems.
Ensure alignment with process design rules and foundry specifications.
Collaborate with foundry engineers to resolve layout-related issues during manufacturing.
Develop and utilize custom scripts or tools to efficiently automate repetitive layout tasks.
Extensive experience with the physical layout of ADCs, DACs, analog sensing and calibration units, and other mixed-signal components.
In-depth expertise in analog layout techniques, including device matching, parasitic minimization, and noise isolation strategies.
Proficiency with Cadence tools (Virtuoso) and flow setups for DRC, LVS and parasitics extractions.
Experience working with optoelectronic systems, and designing TX and RX units for optical circuits, is a plus.
Experience in post-layout simulation using FEM tools such as HFSS is a plus.
Experience with layout automation and SKILL is a plus.
Experience in medium-advanced nodes (<28nm) required.
Competitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions.
Meaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers).
Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location.
Healthcare coverage (including family-friendly options), pension contributions, professional development support, and 25 days of PTO, in addition to public holidays.
Ownership of a key technical domain, with significant vertical and/or horizontal growth opportunities, based on performance and individual drive.
A high-paced, multicultural (with 9 nationalities), and engineering-led environment.
