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Snap Inc.

Senior Embedded Processor Architect

Posted 3 Days Ago
Be an Early Applicant
Hybrid
Eindhoven
Senior level
Hybrid
Eindhoven
Senior level
Lead the design of advanced AI processor cores for AR Glasses, collaborating with experts to create efficient compute architectures.
The summary above was generated by AI

Snap Inc is a technology company. We believe the camera presents the greatest opportunity to improve the way people live and communicate. Snap contributes to human progress by empowering people to express themselves, live in the moment, learn about the world, and have fun together. The Company’s three core products are Snapchat, a visual messaging app that enhances your relationships with friends, family, and the world; Lens Studio, an augmented reality platform that powers AR across Snapchat and other services; and its AR glasses, Spectacles.

The Spectacles team is pushing the boundaries of technology to bring people closer together in the real world. Our fifth-generation Spectacles, powered by Snap OS, showcase how standalone, see-through AR glasses make playing, learning, and working better together.

We’re looking for a Senior Embedded Processor Architect to join our team at Snap Inc!  

What you’ll do:

You will lead the architecture and design of advanced AI processor cores that enable real-time Edge AI and sensor fusion for next-generation AR Glasses. Working from our Eindhoven office, you will collaborate with leading experts in hardware design, machine learning, and image sensors to create compute architectures that blend AI training efficiency, sensor-driven perception, and ultra-low-power performance. In addition, you will: 

  • Architect and define processor cores and compute fabrics optimized for real-time Edge AI and sensor processing workloads.

  • Co-design neural training and inference frameworks with ML researchers to maximize hardware utilization, efficiency, and adaptability.

  • Drive hardware-aware training strategies, enabling dynamic and resource-efficient AI models tailored for embedded platforms.

  • Develop architectural models, simulators, and performance analysis tools to evaluate design trade-offs across latency, power, and area.

  • Collaborate with sensor, vision, and ML teams to build unified processing pipelines that combine neural inference and sensor fusion.

  • Explore architectural optimizations for imaging workloads, including super-resolution, temporal fusion, and neural signal processing.

  • Evaluate emerging sensor technologies—such as event-based imaging and single-photon avalanche diode (SPAD)—to identify opportunities for compute innovation.

  • Mentor junior architects and contribute to Snap’s long-term Edge AI hardware roadmap.

Knowledge, Skills & Abilities:
  • Deep expertise in computer architecture and processor core design, including pipeline and memory system architecture.

  • Strong understanding of machine learning training and optimization, with experience in hardware-aware model design (quantization, pruning, distillation).

  • Proven ability to co-design neural networks and hardware for low-power, real-time performance.

  • Familiarity with imaging and sensor processing pipelines, including (nice to have) exposure to event-based or SPAD-based systems.

  • Experience with performance modeling, simulation, and hardware/software co-design frameworks.

  • Strong analytical and problem-solving skills with the ability to collaborate across hardware, software, and ML research teams.

Minimum Qualifications:
  • MsC or PhD in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.

  • 8+ years of experience in processor architecture, AI accelerators, or embedded compute systems (PhD research counts toward experience).

  • Demonstrated track record of designing or specifying AI-centric processor architectures or specialized compute units.

  • Proficiency in AI frameworks (PyTorch, TensorFlow) and understanding of their computational backends.

  • Experience in performance modeling tools such as SystemC, or equivalent.

Preferred Qualifications:
  • Hands-on experience with Edge AI or vision-centric SoCs.

  • Exposure to sensor fusion, neural image processing, or event-based vision pipelines.

  • Knowledge of low-level compiler toolchains (such as MLIR) for AI optimization.

  • Proven ability to lead cross-disciplinary architectural efforts bridging ML, vision, and hardware.

If you have a disability or special need that requires accommodation, please don’t be shy and provide us some information.

"Default Together" Policy at Snap: At Snap Inc. we believe that being together in person helps us build our culture faster, reinforce our values, and serve our community, customers and partners better through dynamic collaboration. To reflect this, we practice a “default together” approach and expect our team members to work in an office 4+ days per week. 

At Snap, we believe that having a team of diverse backgrounds and voices working together will enable us to create innovative products that improve the way people live and communicate. Snap is proud to be an equal opportunity employer, and committed to providing employment opportunities regardless of race, religious creed, color, national origin, ancestry, physical disability, mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, pregnancy, childbirth and breastfeeding, age, sexual orientation, military or veteran status, or any other protected classification, in accordance with applicable federal, state, and local laws. EOE, including disability/vets.

Our Benefits: Snap Inc. is its own community, so we’ve got your back! We do our best to make sure you and your loved ones have everything you need to be happy and healthy, on your own terms. Our benefits are built around your needs and include paid parental leave, comprehensive medical coverage, emotional and mental health support programs, and compensation packages that let you share in Snap’s long-term success!

Top Skills

Ai Frameworks (Pytorch
Low-Level Compiler Toolchains (Mlir)
Systemc
Tensorflow)

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